1. Technical Field
The present invention relates to a boost circuit utilizing a metal oxide semiconductor field effect transistor (MOS-FET). Further, the present invention relates to a semiconductor integrated circuit for realizing such a boost circuit.
2. Related Art
For an example, it is known to use a boost circuit employing a charge pump method which utilizes the MOS-FET as a power source circuit of a thin-film transistor (TFT) driver IC for driving a liquid-crystal display. FIG. 6 shows a configuration of such a conventional boost circuit. This boost circuit includes: P-channel MOS transistors QP1 to QP3 that carry out the charge pump operation, capacitors C1 to C3 coupled with these transistors, a P-channel MOS transistor QP11 and an N-channel MOS transistor QN11 composing a first inverter IV1, a P-channel MOS transistor QP12 and an N-channel MOS transistor QN12 composing a second inverter IV2, level shifters 1 to 3 and inverters IV11 to IV73 for supplying gate voltages VG1 to VG3 respectively to the transistors QP1 to QP3.
By carrying out the charge pump operation with the supply of boost clock signals VIN1 and VIN2, this boost circuit generates a power source potential VDC3 upon boosting a power source potential VDC1. Here, for simplicity's sake, it is assumed that a power source potential VSS that becomes a reference potential is 0 volts (ground potential); the power source potential VDC1 is V volts (e.g., 2.8 volts); and the power source potential VDC3 is 3×V volts (e.g., 8.4 volts).
The charge pump operation is carried out when charging and discharging of the capacitors C1 and C2 are repeated by switching operations of the transistors QP1 to QP3 and by reversing operations of the first and the second inverters IV1 and IV2, accompanying potential movement. As a result, potential is charged from a drain or a source of the transistor QP1 to the capacitor C3, and the power source potential VDC3 at one end of the capacitor C3 gradually rises to reach about three times the power source potential VDC1 (3×V volts) in a steady state.
FIG. 7 illustrates a voltage waveform of each section of the conventional boost circuit shown in FIG. 6. FIG. 7 shows the voltage waveform after having reached the steady state. The boost clock signals VIN1 and VIN2, whose one phase being a reversed phase of the other, swing between V volts and 0 volts. By shifting high levels of the boost clock signals VIN1 and VIN2 by use of the level shifters 1 to 3, the gate voltages VG1 to VG3 that swing between 3×V volts and 0 volts are obtained. These gate voltages VG1 to VG3 are applied to the gates of the transistors QP1 to QP3 through the inverters IV61 to IV73, whereupon the transistors QP1 to QP3 carry out the switching operation. Consequently, potentials at both ends of the capacitor C1 (VP1 and VM1) and potentials at both ends of the capacitor C2 (VP2 and VM2) change as shown in FIG. 7.
Here, a maximum of 3×V volts (e.g. 8.4 volts) is applied to the gates of the transistors QP1 to QP3. If a maximum voltage between the gate and source of a middle-voltage transistor is around 2×V volts (e.g., 6 volts), however, the gate voltage exceeds this value, and a high-voltage transistor will have to be used. Also, drive capacity of the inverters IV61 to IV73 that drive the transistors QP1 to QP3 will have to be increased. However, the high-voltage transistor is larger in size than the middle-voltage transistor, which increases the substrate area if used as well as the size of the chip and results in high production cost. Further, if the size of the transistor becomes larger, the gate capacitance becomes larger, charging and discharging current as well as quiescent current increases, and a frequency feature of the boost clock signal becomes degraded.
As a related technique, Japanese Unexamined Patent Publication No. 60-245464 (pp. 1–2, FIG. 1) discloses a charge-pump-type boost circuit having good exchange efficiency and giving high output voltage. This boost circuit obtains boosted voltage by being provided with a first switching transistor and a second switching transistor connected in series between a first power source potential and a second power source potential, with a capacitor connected to the connection point of this connection in series, while the first and second switching transistors repeatedly shift from conductive to non-conductive by turns having the capacitor to charge and discharge. Further, a means for supplying a boosted output voltage to a base of the first switching transistor is also provided. However, with this boost circuit, charging and discharging of the capacitor are carried out by use of two diodes, giving the boosted voltage of only about twice the power source voltage.
Accordingly, in view of the issues described above, the present invention aims to provide a boost circuit with which a high voltage-boosting ratio can be obtained without using a large sized, high-voltage transistor.